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Senior RTL Design Engineer AI-Driven EDA Tools

Job in Zürich, 8058, Zurich, Kanton Zürich, Switzerland
Listing for: Founderful
Full Time position
Listed on 2026-03-08
Job specializations:
  • Engineering
    Systems Engineer
Salary/Wage Range or Industry Benchmark: 125000 - 150000 CHF Yearly CHF 125000.00 150000.00 YEAR
Job Description & How to Apply Below
Position: Senior RTL Design Engineer for AI-Driven EDA Tools
Location: Zürich

An innovative AI startup in Zürich is seeking a Senior Chip Design Engineer to lead the development of AI-assisted RTL design tools. You will utilize your experience in digital RTL design to enhance and implement solutions in a collaborative team environment. The ideal candidate has over 3 years of experience in System Verilog and a strong grasp of the RTL-to-GDS flow, combined with a passion for innovation in AI and EDA.

This role offers a dynamic and creative workspace with significant autonomy.
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Position Requirements
10+ Years work experience
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