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Lead Custom​/ASIC Design Engineer – Advanced Nodes

Job in Zürich, 8058, Zurich, Kanton Zürich, Switzerland
Listing for: TalentCloud Group Recruitment
Full Time position
Listed on 2026-02-28
Job specializations:
  • Engineering
    Hardware Engineer, Systems Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 125000 - 150000 CHF Yearly CHF 125000.00 150000.00 YEAR
Job Description & How to Apply Below
Position: Lead Custom / ASIC Design Engineer – Advanced Nodes
Location: Zürich

We are working with a highly innovative Zürich-based semiconductor company building next-generation compute technology. They are now looking for a Lead Custom / ASIC Design Engineer to drive the development of high-performance custom circuits on advanced process nodes.

This is a leadership position with strong hands‑on responsibility.

If you enjoy owning complex silicon from architecture decisions through to bring‑up, and guiding other engineers along the way, this could be a great fit.

You will combine technical depth with team leadership.

Expect to:

  • Lead development of custom digital / analog blocks used in advanced compute architectures
  • Work hands‑on at transistor level across advanced FinFET technologies
  • Guide a small team of custom & layout engineers toward production‑quality silicon
  • Drive block‑level verification, robustness closure & silicon validation
  • Collaborate closely with digital, backend, DFT & test teams
  • Review extraction results, debug parasitics, and ensure clean PPA closure
🌟 What You’ll Bring
  • 7+ years in custom digital, analog, or memory circuit design
  • Experience owning complex blocks through full development cycles
  • Strong knowledge of advanced‑node behaviour (variation, leakage, stability, reliability)
  • Prior experience mentoring or technically leading other engineers
  • Confidence interfacing with layout, backend & system teams
  • A structured and quality‑driven engineering mindset
  • Automation scripting (Python or Tcl)
  • Exposure to memory‑related circuits or datapath‑heavy designs
  • Experience in silicon bring‑up & correlation
  • Background in low‑power or high‑performance compute architectures

This role suits someone who:

  • Still enjoys being hands‑on despite seniority
  • Thinks in terms of performance, power & robustness
  • Is comfortable making architectural trade‑offs
  • Wants visible impact in a focused, high‑caliber hardware team
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