Emulation & Prototyping Design Engineer

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Together, we advance your career.

Join AMD’s NBIO team, a central organization responsible for enabling SoC functionality across the company’s product portfolio. You will contribute to the realization of advanced designs on emulation platforms, working at the intersection of architecture, IP design, verification, post‑silicon, and firmware. Your work will be instrumental in driving cross‑functional execution and achieving successful first‑pass silicon.

The successful candidate works closely with senior designers, provides mentorship to junior engineers, and consistently demonstrates accuracy, attention to detail, and technical excellence. They are able to operate independently, communicate effectively across disciplines, and apply strong analytical and problem‑solving skills.

• Architect and design scalable emulation test benches, develop robust build flows, and create tools that improve productivity and execution efficiency.
• Contribute to the continuous improvement of emulation methodologies, flows, and best practices.
• Embrace AI‑assisted engineering as a core part of daily work, using modern AI tools to enhance emulation methodology development, scripting, build analysis, and debug efficiency, and actively driving adoption of these practices within the team.
• Design and implement high‑quality, synthesizable System Verilog models suitable for emulation platforms.
• Define comprehensive emulation test plans and lead their execution, including both functional and performance validation.
• Lead complex debug activities in close collaboration with IP designers and verification engineers to drive timely issue resolution.
• Support and enable the emulation team in executing defined test plans, milestones, and deliverables.
• Collaborate closely with IP design and verification teams on test planning, execution, and cross‑functional task alignment.
• Verify cutting‑edge features and industry‑standard protocols on emulation platforms.
• Integrate, bring up, and validate third‑party accelerated verification IPs.

• IP, system, and subsystem design experience.
• Strong background in FPGA flows, including synthesis and place‑and‑route (PnR).
• Experience with RTL design, verification, and embedded firmware development.
• Proficiency in C/C++ and System Verilog.
• Strong debugging and problem‑solving skills across hardware and software domains.
• Hands‑on experience using waveform analyzers and debug tools.
• Emulation and/or prototyping experience on industry‑standard platforms.
• Demonstrated ability and willingness to use AI‑assisted tools in daily engineering work, applying them effectively to methodology development, scripting, build analysis, and debug.

• PhD, BSc or MSc in computer science, computer engineering, or electrical engineering

LOCATION: Vancouver, BC

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.

We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.