FPGA VHDL Design Engineer

• Full-time

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We have a PERM position in sunny Tucson, AZ for an ASIC FPGA Designer. There are several positions available at all levels. The job description is below. If you are still available please send an updated resume, your salary requirements, date of availability, and your citizenship status

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*** OUR CLIENT CANNOT ACCEPT H1B, H2B, F1, TN1 VISAS OR GREEN CARD CANDIDATES***). We cannot work with outside parties or do C2C.

This position requires the eligibility to obtain a security clearance. Non-US citizens may not be eligible to obtain a security clearance.

Thank you!

Dee Smith

This position requires the eligibility to obtain a security clearance. Non-US citizens may not be eligible to obtain a security clearance. The Defense Industrial Security Clearance Office (DISCO), an agency of the Department of Defense, handles and adjudicates the security clearance process. Security clearance factors include, but are not limited to, allegiance to the US, foreign influence, foreign preference, criminal conduct, security violations and drug involvement.

Employment is contingent on other factors, including, but not limited to, background checks and drug screens

• Development of design documentation
• Application of configuration management tools
• Application of standard ASIC development design flows and methodologies for SOC design
• Use of VHDL and Verilog
• Use of ARM processor cores and associated peripherals
• ASIC supplier management and technical oversight
• Expert level knowledge of industry standard ASIC development tools

Candidates must have broad technical knowledge and experience and be expert in the design of complex ASICs. Must have written VHDL, simulated, synthesized, placed and routed, integrated and tested designs on target hardware. Candidates must have an understanding and appreciation of technical themes and concepts and the ability to develop solutions independently, but also be able to work with systems engineers, software teams and peers to define requirements.

Candidates must be able to develop technical solutions to complex problems that require the regular use of ingenuity and creativity.

Demonstrated experience and success in applying best in class design methodologies and tools is required. Working knowledge of Microsoft Office products required. Candidates must be highly motivated, high performers with excellent verbal and written communication skills and a strong desire to learn and contribute in a fast-paced team environment. Candidates must be able to apply extensive technical expertise, and have knowledge of other disciplines related to FPGA and ASIC design.

Ability to perform work without appreciable direction is required. Exceptional communication and leadership skills are required.

Experience working in a distributed design and development environment, including tools and methodologies is required.

• FPGA design experience or desire to perform FPGA design
• Knowledge and experience in the use of assertions
• UVM/OVM experience
• Cryptographic experience highly desired
• Knowledge and experience in the design of FPGA for gigabit serial interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing and processor interfaces highly desired. Knowledge and demonstrated experience with System Verilog and Unified Verification Methodology highly desired. Knowledge of C programming and scripting languages such as Perl or Python highly desired. Knowledge of embedded systems design using Microblaze, Nios or ARM processors a strong plus.
  
  FPGA design experience using a Linux based development environment highly desired.

Bachelor of Science in Electrical Engineering