Job Description & How to Apply Below
This is a unique opportunity to sit at the intersection of AI and chip design , partnering with ML and software teams while working closely with customers to integrate next-generation AI tools into real-world semiconductor flows.
What You’ll Do
Act as the hardware domain expert bridging AI/ML and silicon design
Apply AI to optimize RTL-to-GDS chip design flows
Develop benchmarks and evaluation infrastructure for design quality
Build and verify RTL using System Verilog/UVM
Support customers integrating AI-driven solutions into their design environments
What You Bring
Master’s degree in Electrical Engineering, Computer Science, or related field
5–10 years of experience in RTL design and/or verification
Strong Verilog/System Verilog and Python skills
Experience with FPGA (Vivado, Quartus) or ASIC design flows
Excellent communication skills and a customer-focused mindset
Nice to Have
Experience across multiple stages of chip design (RTL, synthesis, physical design)
Familiarity with open-source EDA tools (Yosys, Verilator, OpenSTA, etc.)
Exposure to machine learning or AI-driven design methodologies
Send your resume to :
Talent To Hire Inc. uses Workwolf’s AI-enabled tools to sort and screen applications based on job-related criteria. All hiring decisions involve human review.
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Position Requirements
10+ Years
work experience
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