×
Register Here to Apply for Jobs or Post Jobs. X

RF​/Microelectronics Packaging Engineer

Job in Tempe, Maricopa County, Arizona, 85285, USA
Listing for: RigNet
Full Time position
Listed on 2026-01-17
Job specializations:
  • Engineering
    Manufacturing Engineer, Packaging Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 USD Yearly USD 80000.00 100000.00 YEAR
Job Description & How to Apply Below

About us

One team. Global challenges. Infinite opportunities. At Viasat, we’re on a mission to deliver connections with the capacity to change the world. For more than 35 years, Viasat has helped shape how consumers, businesses, governments and militaries around the globe communicate. We’re looking for people who think big, act fearlessly, and create an inclusive environment that drives positive impact to join our team.

What

you’ll do

The Packaging Engineer position requires handling all aspects of packaging development. This means planning, crafting, and developing advanced or novel packaging. The role also involves managing packaging efforts related to radio frequency communication devices. The products range from IC's, System In Packages, sub-assemblies, and modules. The packaging development process includes package definition, stack-up, substrate layout, bond diagram, drawings, predictive modeling combined with system testing, technical risk/cost assessment, materials and process characterization, compilation of formal documentation, collaborating with sub-contractors and internal assembly and reliability resources, and final release of product.

The

day-to-day

Job responsibilities include but not limited to:

  • Working closely with project development teams and product groups (RFIC, MMIC, Module) to develop the next generation/sophisticated/novel packaging solution for RF communication products
  • Define packages and materials that meet product requirements for reliability, performance, manufacturability, and cost.
  • Ensure all packaging work is completed for New Product and New Technology Introductions
    • Develop and manage packaging documentation including SOWs, package drawings, and process flows
    • Build and layout of semiconductor packages including QFN, SiP, WL-CSP, RDL, Flip Chip, FO-WLP and Interposers
  • Ensure early success in package development with modeling and simulation for thermal, mechanical, and electrical
  • Technically oversee vendors in the manufacture of said packages in conjunction with manufacturing engineers
  • apply your assembly knowledge of die attach, Wirebond, bumping, overmolding to advise product groups on options available to solve problems
  • identify suitable IC, sub-assembly, and module package options and perform feasibility studies for new products
  • interact with product groups for package/cost optimization along with mechanical engineering
  • specify and conduct reliability testing by vendors to insure the reliability of the packaged product
  • Coordinate package related activities across multiple organizations including Marketing, Design, Applications, Test, Assembly Engineering, Quality, and Manufacturing (internal and external factories)
  • Address and solve materials and processing issues that may occur during the development process
  • Manage the package process using industry standard project management tools.
  • Develop and maintain the packaging and technology roadmap through proposal support and long term technology programs
What you’ll need
  • 10+ years in semiconductor packaging including experience in package assembly process, package engineering, quality & reliability and the intersection/relationship of packaging to test.
  • Deep understanding of micro-electronic package structure, mechanical, electrical and thermal performance.
  • Solid grasp of heat transfer and its relation to material properties
  • Packaging knowledge in RFIC, millimeter ware, System In Package, sub-assembly, and/or modules.
  • Experience in semiconductor package design with demonstrated experience in one or more of the following: QFN, SiP, BGA, WL-CSP, Flip Chip and Bumping or FO-WLP
  • Strong understanding of Die Prep, Assembly (die attach, Wirebond, flip chip, etc) and Surface Mount Technology (SMT) process-equipment is desired.
  • Have a high tolerance for ambiguity and solid interpersonal skills
  • In-depth knowledge of interconnect reliability daisy chain testing, CPI and BLR.
  • Understands the metallization schemes for laminates, interposers and SMT.
  • Knowledge of statistical methods and Building of Experiments
  • Must be able to work autonomously and help determine methods and procedures.
  • Customer service oriented.
  • Ability to work with build teams to…
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
 
 
 
Search for further Jobs Here:
(Try combinations for better Results! Or enter less keywords for broader Results)
Location
Increase/decrease your Search Radius (miles)

Job Posting Language
Employment Category
Education (minimum level)
Filters
Education Level
Experience Level (years)
Posted in last:
Salary