Senior System Architect, Analog Design

Senior System Architect Overview

At Synopsys, we drive innovations that shape the way we live and connect. Our Enterprise Ser Des team leads in high‑speed chip design, enabling tomorrow’s connectivity for PCIe and Ethernet. Join us to create the future of pervasive intelligence.

Sunnyvale, CA;
Remote option may also be a possibility.

You are an expert in system‑level architecture for serial‑link transceivers, with 15+ years of experience and a passion for pushing technology boundaries. You thrive in cross‑functional teams, communicate complex ideas clearly, and have a track record of successful product development. Your deep knowledge of high‑speed analog/digital design and strong leadership make you an ideal fit.

• Architecture: definition of architecture and specifications for the transmitter and receiver
• Modelling: design and maintenance of the system level model
• Signal/Power Integrity: analyzing different signal and power integrity requirements
• Sign‑off: system level simulation of the design performance across multiple protocols and channels
• Silicon: qualification and correlation of performance and algorithms in silicon
• Customers: assisting customers on system level performance and algorithmic issues

• You have a MSc or PhD in Electrical or Computer Engineering with 15+ yrs of experience.
• Familiarity with modelling of SERDES transmitters and receivers in Matlab or similar tool
• Knowledge of circuit topologies in high‑speed Rx/Tx Ser Des PHY
• Understanding of Tx/Rx equalization techniques.
• Knowledge of CDR architectures and CDR loop dynamics
• Experience in analyzing link budgets for either NRZ and PAM4 high‑speed serial links
• Knowledge about common high‑speed serial data protocols including Ethernet, OIF, JESD, CPRI
• Experience in lab testing of high‑speed serial links

• Modelling – experience in Matlab/Simulink/C modeling of circuits and systems
• Communications theory – equalization, coding, noise/crosstalk filtering
• Digital – background in digital signal process (DSP)
• Analog – background in high‑speed analog CMOS circuit design
• Hardware – awareness on per‑protocol handing of RX and TX adaptation; hands on experience in measurement of transceiver performance

• Drive next‑gen connectivity solutions.
• Advance Synopsys’ technical leadership.
• Enable superior performance for customers.
• Mentor and elevate team expertise.
• Contribute to industry standards.
• Promote collaboration and innovation.

• Innovative, collaborative, and detail‑oriented leader.
• Strong communicator and problem‑solver.
• Committed to diversity and continuous learning.

You’ll join a collaborative group of analog, digital, and hardware engineers driving enterprise connectivity innovation.

We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will share details during the hiring process.