Silicon System and Software Integration Engineer, Google Cloud

Overview

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

Be part of the TPU team that builds Machine Learning Accelerator ASICs for Google and positively impact Google’s products and billions of Google users across the globe. In this role you will be working on ASIC development, validation, software, tools, and methodologies and have the ability to push the boundaries of chip-development and hardware/software integration and validation. You will own cross-functional work streams focused on end-to-end Hardware/Software integration and validation to demonstrate hardware, software, and system functionality and performance.

You will help the chip team accomplish key silicon development criteria, meet chip and system schedules and achieve readiness for production in various silicon and system validation environments. You will serve as a key bridge between specification, design, and verification teams as well as compiler and performance teams with technical depth and breadth across the ML compute IP.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

• Review chip specifications and designs, developing integration plans with software and system partners while coordinating Hardware/Software delivery.
• Lead the bringup of ML Compute features, integrating and validating complex hardware/software designs, including third-party IPs. Develop validation firmware to verify hardware functionality.
• Execute Hardware Software co-simulation methodologies leveraging RTL, Emulation, and Field-programmable Gate Array (FPGA) environments. Utilize architectural simulators and performance models to correlate results.
• Design validation tests and microbenchmarks to verify IP functionality and performance. Author comprehensive test plans in coordination with cross-functional teams including Design, Design Verification (DV), Firmware, and Architecture.
• Own debug discussions with Design/DV/Software/Architecture teams and help root-cause functional failures and performance issues through the product development cycle. Improve validation coverage and sign-off processes for high-quality tapeout and production deployment.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 5 years of experience in at least two of the following: computer architecture, embedded firmware, ASIC design or verification, or the integration and enablement of first/third party IPs.
• Experience in Hardware/Software integration and validation.
• Experience with Register-Transfer Level (RTL) development, design verification, evaluation.
• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• 4 years of experience with C++/Python software design principles.
• Experience integrating complex hardware/software systems in accelerators.
• Experience developing firmware for embedded systems or accelerators.
• Experience in debugging firmware using simulation tools.
• Knowledge of Real-Time Operating System (RTOS) internals.

Full-time position with US base salary range and compensation details provided:
The US base salary range for this full-time position is $156,000-$229,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within…