Field-Programmable Gate Arrays Engineer

Base pay range

$85.00/hr - $90.00/hr

The selected candidate will be responsible for ASIC & FPGA development on R&D program. Overall contribution to design, simulation, verification, integration & test of complex, high speed products.

This engineer will have 6+ years of experience in each of the following:

• Developing, testing, and integrating digital signal processing (DSP), high speed digital design, high speed communication AND system‑on‑chip (SOC) implemented on FPGA platforms.
• Experience with COTS based control platforms AND embedded processors on FPGA platforms.
• This person will help develop more affordable ways to automate and develop scripts to improve FPGA development efforts.
• Cross discipline collaboration with Systems Architects, RF/Analog & Digital Circuit designers and ASIC/FPGA engineers to create leading edge products for future business growth, contributing to complex systems employing high speed networking concepts.
• The selected candidate will also provide support and technical direction to junior engineers.

Mid‑Senior level

Contract

Airlines and Aviation, Aviation and Aerospace Component Manufacturing, and Defense and Space Manufacturing