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ESD and LU Sign-Off Engineer

Job in Sunnyvale, Santa Clara County, California, 94087, USA
Listing for: Google
Full Time position
Listed on 2026-01-12
Job specializations:
  • Engineering
    Systems Engineer, Electrical Engineering, Electronics Engineer, Hardware Engineer
Job Description & How to Apply Below

ESD and LU Sign-Off Engineer (Google)

We are looking for an experienced engineer to support ESD (Electrostatic Discharge) and LU (Latch‑Up) sign‑off across our advanced technology nodes, ensuring reliable ASIC and SoC products.

About the Job

Join a team that pushes boundaries, developing custom silicon solutions that power Google’s direct‑to‑consumer products. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As an ESD and LU sign‑off Engineer, you will collaborate cross‑functional from IP selection to system design, drive reliability specifications, perform technical evaluations of EDA tools, process nodes, and IPs, and develop reliability solutions that give us a competitive edge.

Minimum Qualifications
  • Bachelor’s degree in Electrical Engineering or related field, or equivalent practical experience.
  • 8+ years of technical experience in physical design disciplines involving ESD/LU and advanced process technology nodes.
  • Experience with ESD analysis and sign‑off.
Preferred Qualifications
  • Master’s or PhD in Electrical Engineering, Computer Engineering, or Computer Science with emphasis on computer architecture.
  • Experience owning ESD sign‑off and establishing methodologies, bringing up ESD flows for new projects.
  • Experience driving design for ESD convergence.
  • Experience evaluating and selecting IP based on ESD considerations.
  • Knowledge of Power Edge RAID Controller (PERC) checks, analysis, and post‑silicon ESD and LU stresses.
  • Knowledge of silicon development milestones.
Responsibilities
  • Drive design for ESD/LU at full‑chip context, influencing physical design methodologies.
  • Influence IP selection by evaluating ESD requirements and formulating correct-by‑construction approaches.
  • Collaborate with physical design, floorplan, and package teams to ensure reliability structures are planned and integrated.
  • Work with internal teams and external vendors to bring up ESD/LU tools (e.g., Path‑Finder, Calibre, ICV) for new projects.
  • Contribute to flows, checkers, reporting and any tooling around sign‑off.
EEO Statement

Google is an equal opportunity workplace and an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity, or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. For accommodations, please complete our Accommodations for Applicants form.

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