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Systems Engineer Electronics Engineer

Senior ASIC DV Engineer: UVM & SystemVerilog Expert

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: Advanced Micro Devices
Full Time position
Listed on 2026-03-02
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 100000 - 125000 USD Yearly USD 100000.00 125000.00 YEAR
Job Description & How to Apply Below
A leading semiconductor company in California is seeking a high-impact MTS Design Verification Engineer to drive verification closure on complex ASIC designs. The ideal candidate will have expert-level knowledge of System Verilog and UVM, extensive debugging experience, and a Bachelor’s degree in Electrical or Computer Engineering. You will work closely with cross-functional teams and contribute to the development of next-generation networking products.

This position comes with a strong focus on collaboration and innovation in a fast-paced environment.
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Position Requirements
10+ Years work experience
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