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UFS IP validation Engineer

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: US Tech Solutions
Full Time position
Listed on 2026-03-01
Job specializations:
  • Engineering
    Systems Engineer, Hardware Engineer, Software Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 USD Yearly USD 80000.00 100000.00 YEAR
Job Description & How to Apply Below
  • Hardware IP knowledge of storage devices including UFS, NAND, NOR, ePROM, etc
  • SoC and Computer architecture
  • Lab equipment, analyzers and hardware debugging techniques
THE ROLE:
  • Looking for a lead systems engineer to provide thought leadership and subject matter expertise to our growing team. As a key contributor, you will have a strong technical background to contribute to all aspects of the post-silicon development process. We have competitive benefit packages and an award-winning culture. Join us!
  • The S3 Business Unit IP Systems Engineering team is seeking an energetic, dynamic, experienced IP Systems Engineer to join our growing team. We work with customers to develop new products, previously including game consoles. As an IP Systems Engineer, you will drive the planning, post-silicon execution, silicon bring-up and debug of client’s processor and graphics based systems while working closely with internal teams to meet product development milestones.
  • As a key contributor to the success of Client’s IP, you will be part of a leading team that drives and enhances client’s abilities to deliver industry leading technologies to our customers. The Systems Engineering team encourages technical innovation to showcase successes, provides opportunities to develop technical knowledge, and facilitates career development.
  • This role specifically focuses on the validation of external UFS storage devices and bus interconnect, according to the industry standard UFS specification.
THE PERSON:

You are a highly motivated hands-on leader with a strong development background, problem solving mentality, excellent written and verbal communication skills, ability to prioritize tasks along with willingness to learn and adapt. Excellent teamwork skills and capability to lead a highly technical team is crucial

KEY RESPONSIBILITIES:
  • Participate in systems design development throughout entire product lifecycle, from pre-silicon and emulation through post-silicon and software integration and validation.
  • Lead technical presentations, demonstrating a good understanding of hardware architecture and expertise in systems design
  • Collaborate with Design, Software, Tools and other teams to drive the definition of testing and debug methodologies to provide the best possible coverage and customer experience for the Client UFS IP.
  • Work with Program Leadership team to define the end to end plan and highlight possible risk areas and address concerns during planning.
  • Be a leader and mentor to the operation team; be hands-on and lead by example
  • Isolation and debug of issues found in the southbridge and peripherals during pre-silicon, bring-up, validation, and production phases of S3 products
  • Able to proactively support team culture that fosters knowledge sharing, excellence, and collaboration
  • Defining and executing validation strategies, enablement of features and unit test plans
  • Publishing and aligning test plan requirements, deliverables and dependencies
  • Working closely with supporting teams such as design, diagnostics, Software/Firmware/BIOS/driver, and project leadership
  • Lead cross-functional technical discussions to drive root cause identification and resolution on technical issues
  • Driving and participating in technical innovations to enhance CLIENT’s validation capabilities including tool and script developments, technical and methodology enhancements
REQUIREMENTS:
  • Knowledge of UFS standard and architecture, with encryption technology preferred
  • In-depth knowledge of SOC architecture and concepts
  • In-depth knowledge of southbridge technology
  • Experience with FPGA and other hardware emulation platforms for pre-silicon debug
  • Strong understanding of BIOS, OS (Windows/Linux), and driver-level interactions and common failure points
  • Good understanding of Boot Flows/Sequences
  • In-depth knowledge of system peripherals such as PCIe, NVMe, USB, I2C, UFS, SATA, SPI,UART and other data bus connections
  • Experience with the UFS analyzer/exerciser, common lab equipment, computer hardware, and networks
  • Led process improvement initiatives to improve engineering quality
  • Strong technical leadership and mentoring skills
  • Knowledge of standard power management features and use-cases
PREF…
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