New Grad ASIC Clocks Design Engineer – Power & Timing

A leading tech company based in Santa Clara is seeking an ASIC Engineer to join the clocks team. In this role, you will architect clock domains, collaborate with design teams, and enhance power, performance, and area (PPA) in NVIDIA chips. Ideal candidates will hold a degree in Electrical Engineering and have strong skills in RTL design and scripting. This opportunity offers competitive salary ranges based on experience, equity eligibility, and benefits in a diverse work environment as NVIDIA continues to lead in AI computing.
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