×
Register Here to Apply for Jobs or Post Jobs. X

Senior Analog PLL Design Engineer; FinFET

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: AMD
Full Time position
Listed on 2026-01-12
Job specializations:
  • Engineering
    Electrical Engineering, Systems Engineer, Electronics Engineer, Engineering Design & Technologists
Salary/Wage Range or Industry Benchmark: 125000 - 150000 USD Yearly USD 125000.00 150000.00 YEAR
Job Description & How to Apply Below
Position: Senior Analog PLL Design Engineer (FinFET)
A leading semiconductor company is seeking an experienced Analog Design Engineer in Santa Clara, CA. This role involves designing complex PLL components and collaborating with various engineering teams. The ideal candidate should have strong Mixed Signal Circuit Design skills, especially in FinFET technology, coupled with experience in the semiconductor industry. In addition to technical expertise, the position requires effective communication skills and the ability to mentor junior engineers, while aiding in high-quality execution of designs.
#J-18808-Ljbffr
Position Requirements
10+ Years work experience
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
 
 
 
Search for further Jobs Here:
(Try combinations for better Results! Or enter less keywords for broader Results)
Location
Increase/decrease your Search Radius (miles)

Job Posting Language
Employment Category
Education (minimum level)
Filters
Education Level
Experience Level (years)
Posted in last:
Salary