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Senior Analog PLL Design Engineer; FinFET
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-01-12
Listing for:
AMD
Full Time
position Listed on 2026-01-12
Job specializations:
-
Engineering
Electrical Engineering, Systems Engineer, Electronics Engineer, Engineering Design & Technologists
Job Description & How to Apply Below
A leading semiconductor company is seeking an experienced Analog Design Engineer in Santa Clara, CA. This role involves designing complex PLL components and collaborating with various engineering teams. The ideal candidate should have strong Mixed Signal Circuit Design skills, especially in FinFET technology, coupled with experience in the semiconductor industry. In addition to technical expertise, the position requires effective communication skills and the ability to mentor junior engineers, while aiding in high-quality execution of designs.
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Position Requirements
10+ Years
work experience
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