Mixed-Signal ASIC Design Engineer

Overview

Keysight is at the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create world‑class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do.

Our award‑winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry‑first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers.

This job will be part of Keysight Laboratories, which develops state‑of‑the‑art and beyond application‑specific integrated circuits (ASICs), enabling performance breakthroughs that differentiate our electronic test and measurement products. Keysight fosters a collaborative engineering environment which emphasizes teamwork, enthusiasm, and excellence in creating highest performance, analog and mixed‑signal integrated circuits.

You will join a group in Mixed‑Signal ASIC Design section, developing custom ASIC data converter solutions in GHz applications, implementing core ADC and DAC structures, as well as streaming I/O data paths, or complex measuring and emulating communication transceiver ASICs in CMOS and BiCMOS technologies. We are dedicated to raising the bar by innovating the next generation of high‑performance mixed‑signal ASICs that provide Keysight’s test and measurement products with a competitive advantage in performance and cost.

These ASICs will enable the generation and characterization of leading‑edge high‑speed signals, such as serial links and RF waveforms. Become a part of our team and apply your IC design knowledge and experience to make the world’s fastest and most accurate measurement ICs.

Education:

• PhD in Electrical Engineering or closely related field, with thesis work on mixed‑signal IC design preferred, or an M.S. in Electrical Engineering with substantial experience in IC design are required.

Experience:

• Experience in designing high‑speed analog and mixed‑signal circuits in CMOS or BiCMOS technologies.
• Experience must include both transistor‑level design and physical design.
• Experience with mixed‑signal building blocks and integrated systems, such as PLLs, DACs, serialize rs, ADCs, or wideband amplifiers.
• Demonstrated ability to work well in a team environment, and strong ability to document and present results.
• Excellent interpersonal, problem‑solving, and communication skills to work in a dynamic environment as part of multiple teams working on multiple projects and collaborate cross‑functionally with a team‑oriented mindset.
• Ability to troubleshoot, and drive to root cause on difficult problems.

Desired skills:

• Demonstrated experience in mixed‑signal circuit design, including experience through a complete design and fabrication cycle.
• A strong working knowledge of higher GHz clock, DAC, and in particular ADC circuits.
• Solid background in device modelling, thermal design, and IC package design.
• A sound understanding of the underlying semiconductor technologies and devices and their parasitics, enabling creative design to push circuit limits.
• Understanding of signal integrity and EM issues.
• Preferred experience with at least the 65 nm process node.
• Experience with mixed‑mode simulation of analog and digital blocks, including behavioral modelling of analog circuits, using tools like Verilog or Verilog‑A for simulation.
• Familiarity with programming and scripting languages to enable automation in the design, simulation, and testing of ICs.
• Ability to perform hands‑on measurements using state‑of‑the‑art test and measurement equipment and techniques.
• Experience with synthesized digital design flows, using RTL descriptions to deliver verified netlists for physical synthesis.
• A highly self‑motivated mindset to accomplish all the tasks required to meet aggressive product development schedules and world‑class manufacturing expectations.

This position requires access to…