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SoC Cache Design Engineer - RTL & Performance

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: Apple Inc.
Full Time position
Listed on 2026-01-12
Job specializations:
  • Engineering
    Systems Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 200000 - 250000 USD Yearly USD 200000.00 250000.00 YEAR
Job Description & How to Apply Below
A leading technology company in Santa Clara is seeking a hardware engineer to design and develop cache subsystems for high-performance systems on chip (SoC). Responsibilities include tailoring hardware designs and ensuring optimal performance through architectural trade-offs. Candidates should possess a B.S. in a relevant field, with a knowledge of RTL design and memory subsystems. Benefits include a competitive salary, stock options, and comprehensive health coverage.
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