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Memory Systems Architect – DDR​/DDRDebug & Validation

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Rambus
Full Time position
Listed on 2026-03-01
Job specializations:
  • Engineering
    Systems Engineer, Electrical Engineering, Hardware Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 132400 - 246000 USD Yearly USD 132400.00 246000.00 YEAR
Job Description & How to Apply Below
Position: Memory Systems Architect – DDR4/DDR5 Debug & Validation
A technology company in San Jose is seeking an experienced Applications Engineer to support international customers with DRAM and memory interface chips. Responsibilities include analyzing and debugging technical issues, supporting new chip designs, and communicating with customers. The ideal candidate has over 8 years of experience in hardware design or applications engineering and a BS in Electrical Engineering. The role offers a hybrid work environment and a competitive salary ranging from $132,400 to $246,000.
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