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Ic Design Engineer

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Broadcom
Full Time position
Listed on 2026-02-28
Job specializations:
  • Engineering
    Systems Engineer, Engineering Design & Technologists, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 120000 - 192000 USD Yearly USD 120000.00 192000.00 YEAR
Job Description & How to Apply Below
Position: IC DESIGN ENGINEER

Job Description

ASIC/Layout Design Engineer:
Oversees definition, design, verification, and documentation for ASIC development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Evaluates all aspects of the process flow from high-level design to synthesis, place and route, and timing and power use. Analyzes equipment to establish operation data, conducts experimental tests, and evaluates results.

May also review vendor capability to support development.

Knowledge
:
Having broad expertise or unique knowledge, uses skills to contribute to development of company objectives and principles and to achieve goals in creative and effective ways. Barriers to entry such as technical committee review exist at this level.

Job Complexity
:
Works on significant and unique issues where analysis of situations or data requires an evaluation of intangibles. Exercises independent judgment in methods, techniques and evaluation criteria for obtaining results. Creates formal networks involving coordination among groups.

Supervision
:
Acts independently to determine methods and procedures on new or special assignments. May supervise the activities of others.

Hiring Requirements

This position is responsible for, but not limited to, the following job duties:

  • Work as part of a physical design team implementing chips from netlist to GDSii with good understanding of the technology elements as well as design flow in all stages.
  • Responsible for floor planning, design partition and block pin assignment.
  • Perform blocks PnR, timing closure, physical verification.
  • Perform blocks IR/EM analysis. Experience with chip level IR/EM analysis is a big plus.
  • Familiar with scripting languages such as Tcl, Perl and Python. Write scripts to automate physical design flow and make it more efficient.
  • Expertise on low power IC design is desirable.
  • Good knowledge on physical verification using Mentor’s Calibre tool.

Minimum requirements:

Bachelor’s degree and 8+ years of related experience or Master’s degree with 5+ years of experience.

Compensation And Benefits

The annual base salary range for this position is $120,000 - $192,000.

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package:
Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

R024617

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