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Senior RTL Design Engineer SoC/FPGA
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-02-22
Listing for:
CareerArc
Full Time
position Listed on 2026-02-22
Job specializations:
-
Engineering
Systems Engineer, Electrical Engineering, Engineering Design & Technologists, Electronics Engineer
Job Description & How to Apply Below
A leading semiconductor company in San Jose is seeking a Senior Design Engineer to drive the development of high-speed interfaces and digital components. This role involves RTL design, timing constraint management, and mentoring other engineers. Applicants should have a degree in Electrical Engineering and a passion for digital design. The position offers opportunities for continuous technical innovation and a collaborative environment.
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Position Requirements
10+ Years
work experience
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