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Senior Defect Modeling & Testing Architect

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: TSMC
Full Time position
Listed on 2026-02-06
Job specializations:
  • Engineering
    Electrical Engineering, Systems Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 152500 - 244000 USD Yearly USD 152500.00 244000.00 YEAR
Job Description & How to Apply Below
A leading semiconductor foundry in San Jose is seeking an experienced engineer to develop defect modeling methodologies and tools for advanced packaging technologies. This role involves collaboration with design and testing teams and demands over 15 years of experience in semiconductor reliability and defect physics. The position offers a base salary range of $152,500 to $244,000 and a chance to influence industry standards.

Join us to shape the future of semiconductor innovation.
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Position Requirements
10+ Years work experience
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