FPGA​/RTL Design Engineer

Overview

We are seeking a FPGA/RTL Engineer with strong experience in FPGA, RTL, VHDL and System Verilog for a client in San Jose, CA.

Job Title:

FPGA / RTL Design Engineer

Location:

San Jose, CA

FPGA/RTL Design Engineer to design, implement, and validate digital circuits and FPGA-based solutions. This role involves hands-on development using RTL languages, FPGA design tools, and simulation environments, while also supporting customers and creating technical assets that enable successful adoption of our products.

• Design & Implementation:
  Develop RTL code (Verilog, VHDL, System Verilog) for FPGA and digital circuits, integrating IP and system software.
• Simulation & Debugging:
  Perform functional simulation, debug FPGA designs, and resolve design issues.
• Validation & Testing:
  Create unit tests, example designs, and demos; ensure readiness of feature releases.
• Technical Enablement:
  Develop user guides, application notes, and training materials for customers.
• Customer Support:
  Respond to technical inquiries, reproduce issues, and collaborate with engineering teams for resolution.
• Optimization:
  Conduct synthesis, power, and thermal analysis to meet performance and efficiency targets.
• Collaboration:
  
  Work closely with architecture, verification, and physical design teams to deliver high-quality solutions.

• BS in Electrical/Computer Engineering or related field.
• 5+ years of experience in FPGA design, RTL development, or applications engineering.
• Proficiency in FPGA design tools and third-party simulators.
• Strong debugging skills and experience with FPGA development boards.
• Expertise in RTL design using Verilog, VHDL, or System Verilog.

• Experience with power/thermal analysis tools.
• Scripting skills (TCL, Python).
• Strong problem-solving and analytical abilities.