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Senior Analog IC Designer - SerDes Speed I/O
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-01-23
Listing for:
Cadence Design Systems
Full Time
position Listed on 2026-01-23
Job specializations:
-
Engineering
Electrical Engineering, Electronics Engineer, Systems Engineer, Engineering Design & Technologists
Job Description & How to Apply Below
A leading electronic design automation firm in California seeks a Lead Analog IC Designer. This role focuses on designing and developing analog/mixed signal IC circuit blocks with responsibilities including verification against specifications and collaboration with team members. Candidates must have at least 3 years of experience in CMOS Ser Des or high-speed I/O IC design, strong problem-solving abilities, and an MS or PhD in Electrical Engineering.
Competitive compensation and comprehensive benefits are offered, ensuring a rewarding work environment.
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Position Requirements
10+ Years
work experience
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