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Silicon Photonics Reliability Engineer

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Advanced Micro Devices
Full Time position
Listed on 2026-01-17
Job specializations:
  • Engineering
    Systems Engineer, Electrical Engineering
Salary/Wage Range or Industry Benchmark: 150000 - 200000 USD Yearly USD 150000.00 200000.00 YEAR
Job Description & How to Apply Below

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture.

We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

THE ROLE:

As a Silicon Photonics Reliability Engineer in the Optical IO team, you will collaborate with various Product Development, Silicon Design and Packaging Groups and interface with key technology partners. This individual serves as a critical technical point of contact to ensure best-practices, standards and emerging reliability approaches and methodologies are architected, developed, and driven throughout the organization. This position focuses on establishing industry leading reliability solutions for advanced silicon photonics products.

You will be part of a larger team that defines reliability solutions from concept, design, development, qualification and test through production deployment.

THE PERSON:

This is a technical leadership position that requires engineering experience in semiconductor reliability with a focus on silicon photonics. The ideal candidate should have a proven ability to tackle complex reliability challenges for various silicon photonics & optical interconnect technologies. This role requires excellent communication and coordination across various teams and capable of defining long-term reliability solutions.

KEY RESPONSIBILITIES:
  • Collaborate with silicon design, product & test, and packaging teams to architect & define reliability solutions for silicon photonics at wafer-level and CPO-level
  • Collaborate with design, packaging, and key suppliers to understand structural and parametric mechanisms for reliability and quality issues
  • Interface with suppliers to provide technical inputs & reliability requirements to enable production-worthy end-to-end solutions
  • Deep knowledge to train other teams & engineers in the field of silicon photonics across design, packaging and volume test
  • Responsible for identifying & mitigating reliability challenges and executing large technical projects and processes in a timely manner
  • Expertise with fundamental reliability physics of leading silicon photonics foundry process technologies and advanced packaging technologies
  • Expertise with end-to-end reliability and failure analysis, implementing POF models, stress testing methodologies (JEDEC/standards based, thermal/humidity cycling, electromigration, electrical overstress, etc), and root-cause analyses using advanced analysis techniques (FIB, SEM/TEM, EDX, etc)
  • Develop and implement corrective actions to prevent recurrence of failures
  • Collaborate with design, packaging and process engineering teams to identify root causes and implement effective changes
  • Employ statistical analysis and problem-solving techniques to identify root causes of failures
  • Analyze failure data to identify trends and patterns
  • Generate comprehensive failure analysis reports and presentations
  • Communicate complex technical information to a wide range of audiences
  • Deep knowledge of key theoretical approaches, modeling and analytical techniques to assess and project failure distributions, early failures, wearout failures, lifetime projections and FIT rates
  • Deep knowledge of accelerated stress approaches such as HTOL, HAST, ESD/LU and others
  • Experience with stress hardware such as controlled temperature chambers, liquid heat exchanger apparatus, air flow apparatus, wafer chucks and other approaches
  • Familiarity with test equipment station SPC/EOM and control charts
  • Experience with stress experiment design including readpoint intervals and readpoint analysis
  • Specify and develop critical infrastructure and develop vendor…
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