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Manager, Firmware Engineering

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Supermicro
Full Time position
Listed on 2026-01-16
Job specializations:
  • Engineering
    Software Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 215000 USD Yearly USD 215000.00 YEAR
Job Description & How to Apply Below

Job Req  About Supermicro

Supermicro® is a Top Tier provider of advanced server, storage, and networking solutions for Data Center, Cloud Computing, Enterprise IT, Hadoop/ Big Data, Hyperscale, HPC and IoT/Embedded customers worldwide. We are the #5 fastest growing company among the Silicon Valley Top 50 technology firms. Our unprecedented global expansion has provided us with the opportunity to offer a large number of new positions to the technology community.

We seek talented, passionate, and committed engineers, technologists, and business leaders to join us.

Job হওখ কু সহ

Super Micro Computer, Inc. is seeking a talented Manager, Firmware Engineering who will be responsible for developing world‑class firmware to fully maximize the strong hardware architecture of our in‑house servers. We are looking for individuals who enjoy creating firmware for server products, prototyping concepts, and investigating new technologies. In this position, the candidate will collaborate with cross‑functional teams to design robust networking products.

Essential Duties and Responsibilities

Includes the following essential duties and responsibilities (other duties may also be assigned):

  • Responsible for CPLD functional implementation across Enterprise, AI, GPU, Datacenter, and Storage server systems, as well as networking products.
  • Familiar with protocol spec and communication.
  • Collaborate closely with product management(:: hardware):: firmware, and software teams to ensure successful project delivery.
  • Independently work and debug using the scope or analyzer.
  • Familiar with X86 system and platform.
  • Familiar with UFM, Wishbone, and CPLD update method.
  • Familiar with Verilog.
  • Monitor progress across the group’s responsibility for the feature area.
  • Perform code reviews and adhere to CPLD/FPGA development best practices.
  • Optimize logic, resource utilization, and performance while ensuring design efficiency.
Main
  • Minimum BS in EE/CS/CE, Master is preferred
  • Minimum 8 years of working experience in CPLD development
  • Strong understanding of FPGA, CPLD, RTL design principles and architectures.
  • Experience with x86 platform design and protocols.
  • Knowledge of power sequence, I2C, SPI, RoT, etc.
Salary Range

$190aco—$215,000

The salary offered will depend on several factors, including your location, level, education, training, specific skills, years of experience, and comparison to other employees already in this role. In addition to a comprehensive benefits package, candidates may be eligible for other forms of compensation, such as participation in bonus and equity award programs.

EEO Statement

Supermicro is an Equal Opportunity Employer and embraces diversity in our employee population. It is the policy of Supermicro to provide equal opportunity to all qualified applicants and employees without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, protected veteran status or special disabled veteran, marital status, pregnancy, genetic information, or any other legally protected status.

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