×
Register Here to Apply for Jobs or Post Jobs. X

Senior ASIC​/RTL Design Engineer: SoC Timing & RTL

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Advanced Micro Devices
Full Time position
Listed on 2026-01-16
Job specializations:
  • Engineering
    Electrical Engineering, Systems Engineer
Salary/Wage Range or Industry Benchmark: 200000 - 250000 USD Yearly USD 200000.00 250000.00 YEAR
Job Description & How to Apply Below
A technology company in San Jose is seeking a Senior ASIC/RTL Design Engineer to contribute to the development of large SoCs. The role requires expertise in RTL ownership, complex timing constraints, and EDA tools, alongside strong communication skills. Candidates should have a Bachelor’s or Master’s degree in Electrical Engineering or Computer Engineering. This is a non-remote role requiring in-person presence, and does not offer visa sponsorship.
#J-18808-Ljbffr
Position Requirements
10+ Years work experience
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
 
 
 
Search for further Jobs Here:
(Try combinations for better Results! Or enter less keywords for broader Results)
Location
Increase/decrease your Search Radius (miles)

Job Posting Language
Employment Category
Education (minimum level)
Filters
Education Level
Experience Level (years)
Posted in last:
Salary