Lead HW Post-Silicon Validation Engineer

Meet the team

Welcome to the Post-Silicon Validation Team at Cisco! Our group offers a unique combination of a startup culture with the benefits of working for the leading networking company in the world. You will engage in dynamic collaboration with verification engineers, designers, and cross-functional teams, working together to ensure the successful verification of the ASIC throughout its lifecycle.

Operating at the forefront of technology, we work with cutting-edge, high-speed, and power-hungry devices. Our small, but highly influential team thrives in this challenging environment, leveraging our expertise to impact the future of networking technology. With a commitment to excellence and a passion for transformative technology, we are shaping the future of high-performance networking and delivering unparalleled value in every project we undertake.

Join us and be a part of a team where professionalism meets impact.

We are seeking a Senior HW Post-Silicon Validation Engineer with deep expertise in lab-intensive hardware validation to lead testing and debug of high-performance networking silicon. This role is heavily focused on hands‑on work in silicon validation labs, driving early‑silicon bring‑up, performing advanced electrical and protocol measurements, and owning end‑to‑end root‑cause analysis of silicon, package, and board‑level issues. The position offers significant technical ownership, cross‑functional influence, and exposure to complex networking ASICs and high‑speed interfaces.

• Lead hands‑on post‑silicon electrical validation in lab environments for networking ASICs and evaluation platforms
• Own early‑silicon bring‑up activities from first power‑on through feature enablement
• Define, execute, and refine detailed hardware validation plans covering functionality characterization, performance, and reliability
• Drive validation readiness, lab infrastructure setup, and test coverage strategy
• Maintain and optimize lab benches, boards, fixtures, and test equipment
• Lead power‑on sequencing, reset strategy validation, clock bring‑up, and strap configuration
• Perform in‑depth voltage, current, power integrity (PDN), and signal integrity analysis
• Capture, analyze, and interpret waveforms, eye diagrams, jitter, BER, PDN measurements, power supply stability and noise
• Independently isolate and root‑cause silicon, package, board, or signal integrity issues
• Develop mitigation strategies, workarounds, and design recommendations
• Lead validation of Ethernet MAC/PHY and high‑speed interfaces such as PCIe and Ser Des
• Drive link bring‑up, training, lane margining, compliance, and interoperability testing
• Perform advanced BER testing and margin analysis across voltage, temperature, and process corners
• Oversee packet‑level validation using traffic generators and protocol analyzers
• Validate system‑level behavior under real‑world networking workloads
• Advanced‑level operation of oscilloscopes, logic analyzers, VNAs, protocol analyzers, BERTs, and multimeters
• Develop and maintain lab automation using scripts and frameworks (e.g., Python)
• Plan and execute thermal testing using chambers and chillers across operating ranges
• Drive technical discussions with design teams using data‑backed analysis
• Lead debug reviews, validation status meetings, and silicon readiness assessments

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field with 8+ years of experience in post‑silicon electrical validation, hardware bring‑up and lab‑based silicon debug
• Experience in electronics, digital logic, signal integrity, and power integrity
• Experience in high‑speed measurement techniques (eye diagrams, BER, jitter, compliance testing)
• Experience with interfaces such as DDR5, USB 3.x, SGMII, PCIe Gen3, USB
  2.0, eMMC, SPI, MDIO, I2C, and UART
• Experience with reading and reviewing schematics and layout files for complex boards
• Experience working independently, lead, plan and execute lab‑based debug efforts

• Hands‑on experience with silicon bring‑up and post‑silicon validation labs
• Experience validating Ethernet, PCIe, and Ser Des interfaces
• Scripting…