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Lead Analog IC Designer
Job in
San Jose, Santa Clara County, California, 95199, USA
Listed on 2026-01-12
Listing for:
Cadence
Full Time
position Listed on 2026-01-12
Job specializations:
-
Engineering
Electronics Engineer, Systems Engineer
Job Description & How to Apply Below
Lead Analog IC Designer – Cadence
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Responsibilities- Design and develop analog/mixed‑signal IC circuit blocks from initial concept and specifications through final verification of conformance to customer specifications.
- Minimum of 3 years of experience in CMOS Ser Des or high‑speed I/O IC design and development.
- Working knowledge of common Ser Des standards and their electrical requirements.
- Proficient design experience in the following Ser Des circuit blocks:
Driver, Receiver, Serializer, Deserializer, Phase Interpolator, PLL, High‑Speed Clock Distribution, ADC and DAC, Bias and Bandgap, and Voltage Regulators. - Excellent problem‑solving skills, analog aptitude, good communication skills, and ability to work cooperatively in a team environment.
- Proficiency using CAD tools for circuit simulation, layout, and physical verification.
- Cadence tool experience, lab test experience, and design experience at >112 Gbps and in
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