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Senior RTL Design Engineer Speed SoC​/FPGA

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: AMD
Full Time position
Listed on 2026-01-12
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 250000 USD Yearly USD 250000.00 YEAR
Job Description & How to Apply Below
Position: Senior RTL Design Engineer - High-Speed SoC/FPGA
A leading semiconductor company is seeking a self-motivated Senior Design Engineer to focus on RTL design and validation of high-speed interfaces. The ideal candidate will have strong skills in digital design, Verilog/System Verilog, and collaboration with verification teams. This role also demands excellent problem-solving capabilities and a passion for ownership of tasks, with relevant academic credentials required. Join a culture of innovation in San Jose, CA, and help shape the future of computing solutions.
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Position Requirements
10+ Years work experience
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