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Senior Package Engineer

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Persimmons Inc.
Full Time position
Listed on 2025-11-28
Job specializations:
  • Engineering
    Systems Engineer, Electrical Engineering
Salary/Wage Range or Industry Benchmark: 120000 - 160000 USD Yearly USD 120000.00 160000.00 YEAR
Job Description & How to Apply Below

Who we are

Persimmons is building the infrastructure that will power the next decade of AI. Founded in 2023 by veteran technologists from the worlds of semiconductors, AI systems, and software innovation, We’re on a mission to enable smarter devices, more sustainable data centers, and entirely new applications the world hasn’t imagined yet.

Why join us

We’re growing fast and looking for bold thinkers, builders, and curious problem-solvers who want to push the limits of AI hardware and software. If you're ready to join a world-class team and play a critical role in making a global impact - we want to talk to you.

What you’ll do

As a Senior Packaging Engineer, you will be responsible for creating and verifying Persimmons package designs that will run the smallest to largest AI models. Your primary duties and responsibilities include:

  • Drive end-to-end substrate design from concept through tape-out with minimal oversight; manage OSAT partnerships for cost, schedule and DFM optimization
  • Design advanced 2.5D/3D interposers for high-speed interfaces (UCIe, HBM, PCIe)
  • Owner of SI/PI, stack-up definition, PDN architecture & multi-Gbps signal integrity
  • Execute co‑design with silicon & hardware teams: electrical modeling (Ansys Q3D, HFSS), bump pattern optimization, parasitics EMI.
  • Lead DFM reviews with vendors, independently resolve design rule conflicts, deliver manufacturable solutions on schedule.
What We Need to See
  • BS/MS in Electrical Engineering, Materials Science, or related field
  • 7+ years of hands‑on experience in advanced semiconductor packaging design
  • Strong communication & co‑design skills between silicon, package & system
  • Proven track record with advanced substrate & interposer e.g. 2.5D/3D packaging
  • Experience with low‑loss PCB materials for high‑speed applications
  • Proficiency in Cadence Allegro Package Designer or similar tools
  • Familiar with SI/PI tools like Ansys HFSS & SIwave
  • Experience with DRC, DFM, package reliability testing and failure analysis
  • Understanding of thermal management solutions for high‑power packages
Benefits
  • Competitive salary and benefits package
  • Flexible PTO
  • 401k
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Position Requirements
10+ Years work experience
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