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Engineering Design & Technologists

CAD Engineer: Gate-Level Timing & STA Automation

Job in San Jose, Santa Clara County, California, 95199, USA
Listing for: Apple Inc.
Full Time position
Listed on 2026-01-12
Job specializations:
  • Engineering
    Engineering Design & Technologists
Salary/Wage Range or Industry Benchmark: 125000 - 150000 USD Yearly USD 125000.00 150000.00 YEAR
Job Description & How to Apply Below
A leading tech company in San Jose is seeking a CAD Engineer to develop and enhance gate-level STA flows for silicon designs. The ideal candidate has 10+ years of experience and advanced skills in Python and Tcl programming. You will collaborate with design teams to analyze timing-related issues and improve overall STA methodology. This position offers competitive compensation and comprehensive benefits, including stock programs and educational reimbursement.
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