Senior UVM Design Verification

Triple Crown is a leading provider of hardware, embedded, software, and mechanical engineering talent. Businesses and technology teams, from Fortune 500 enterprises to emerging startups, rely on our ability to rapidly place the developers, architects, coders, and designers who engineer digital transformation and growth.

Job Type: Contract

Duration: 6+ Months

Location: Onsite in San Jose, CA

Requirement: 8+ years of relevant experience

We are seeking an experienced Senior ASIC Design Verification Engineer to lead verification efforts for advanced AI and compute chiplet technologies. In this role, you’ll architect, build, and execute comprehensive verification environments from the ground up — ensuring performance, reliability, and scalability across high-performance fabric and interconnect systems.

You’ll work closely with cross-functional teams across design, architecture, and firmware to validate cutting‑edge SoC designs used in next‑generation AI platforms.

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field
  .
• 7–10+ years of hands‑on experience in ASIC or SoC design verification
  .
• Proven expertise in test plan creation, simulation environment setup, debugging, and coverage closure
  .
• Lead verification planning and execution for fabric‑level and full‑chip designs, ensuring thorough validation across all design hierarchies.
• Collaborate with architecture, firmware, and design teams to develop detailed test plans that align with design specifications and performance goals.
• Architect and implement test benches from scratch using System Verilog/UVM methodologies.
• Develop constrained‑random stimulus generation
  , intelligent checkers, scoreboards, and assertions to ensure design correctness and coverage completeness.
• Create and maintain scalable verification flows
  , including automated regression and coverage‑driven methodologies.
• Contribute to code reviews, feature verification tracking, and structured agile sprint processes to drive verification excellence.

• SoC
• UVM
• Health, Dental and Vision Insurance
• 401k

Mid‑Senior level

Contract

Semiconductor Manufacturing

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