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Systems Engineer Electronics Engineer Hardware Engineer Software Engineer

Senior SystemVerilog​/UVM Verification Architect

Job in San Francisco, San Francisco County, California, 94199, USA
Listing for: Chiparama
Full Time position
Listed on 2026-03-01
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer, Hardware Engineer, Software Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 USD Yearly USD 80000.00 100000.00 YEAR
Job Description & How to Apply Below
A leading technology company in San Francisco is seeking an experienced Verification Engineer to develop test plans, build verification environments, and ensure functional correctness of complex hardware IPs and SoCs. The ideal candidate will have deep expertise in System Verilog/UVM verification methodologies and experience with simulation and formal verification. This role demands strong analytical skills and offers the chance to work on cutting-edge designs with a focus on both hardware and software teams.
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Position Requirements
10+ Years work experience
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