Physical Design Engineer
Listed on 2026-01-19
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Engineering
Systems Engineer, Hardware Engineer, Electronics Engineer
Mirafra is a global product engineering services company with expertise in semiconductor design, embedded and application software.
Job DescriptionJob Overview:
The Graphics team is looking for Experienced Physical Design Engineers to work on Adreno Graphics cores in the area of Physical Implementation.
Responsibilities:
The Physical Implementation Engineer will work in Qualcomms Adreno GPU team and will be responsible for all the P&R experiments targeted at validating new flows/methodologies.
Minimum Qualifications:
Able to deal with MSM Top level complexity from FP, Placement, CTS, Routing and timing closure. Must be able to take the Hardmacro through P&R from Netlist to GDS including timing closure, formal and Physical verification.
Skills- Macro placement, power grid implementation, power routing, special routing like analog signals etc.
- Power collapse/Low power implementation flow
- Perform STA using primetime Si or Tempus or any industry standard STA engine, timing closure, ECO generation, timing correlation.
- Deep understanding of timing skills to perform correlation, timing fixes , corner/voltage definetions etc.
- Perform custom or regular clock tree implementation at block level or top level.
- Clock tree balance of complicated tree, clock power reduction techniques etc.
- Power collapse/power gaing techniques/implementation
- UPF/CPF flow knowledge
- CLP/FV
- Running all the PV checks (DRc/LVS/ERC/Softcheck) and deep understanding of all the rules and fixes
All your information will be kept confidential according to EEO guidelines.
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