Senior Formal Verification Engineer

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Qualcomm Technologies, Inc.

Engineering Group, Engineering Group > GPU ASICS Engineering

QCT's Digital ASIC design team delivers cutting edge hardware and software products that power the user experience and graphics content of the most advanced mobile devices on the market.

Graphics formal verification positions involve the developing high-quality formal verification test benches to verify complex designs in GPU. Position involves working with design, implementation teams to verify designs with high quality. Must be proficient in debugging, deep bug hunting, formal tools, formal verification methodologies and processes. Candidate should be proficient in design debug and assertion development.

• Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 6+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
• Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 5+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
• PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.

• Synthesize the Verilog RTL and create models and compile them to emulators like Veloce/Palladium/Zebu and/or FPGA platforms
• Develop all aspects of hardware emulator implementation, with emphasis on design partitioning, synthesis, place and route, timing analysis & run time performance.
• Drive debug failures on emulator using latest technologies. Work with designers and SW driver team for testplan and debug.
• Work with tool vendors and push the methodology to improve the area/performance of the synthesized FPGA RTL.
• Work on third-party IP integration and system-level debugging.
• System level RTL simulation & design verification.
• Support chip bring up and post silicon debug.
• Debug functional and timing models.

• Bachelor’s degree in Science, Engineering, or closely related field
• 1+ years of hands on experience in emulation/simulation acceleration/FPGA.
• 1+ years in Design validation/Post-Silicon debug.
• 1+ years of hands on experience in creating high performance & area efficient emulation environments from RTL.
• 1+ years of hands on experience in emulator platforms, platform bringup, digital design, verification, debugging, and waveform viewers.
• 1+ Hardware emulators, such as Palladium, ZeBu, Veloce, or FPGA systems based on Xilinx or Altera FPGAs.
• 1+ Emulation methodologies, including in-circuit emulation, hybrid systems, or simulation acceleration.

• MS degree in Electrical Engineering or equivalent; 1 year of practical experience
• Design Verification knowledge – UVM/System Verilog preferred
• Knowledge of GPU/CPU/DDR/Bus preferred
• Verilog and System Verilog experience.
• Debugging system-level software, Debug RTL
• Programming skills in C and C++
• Scripting in Python, Tcl, or Perl
• Knowledge of Vendor Emulation tools/Xilinx tools/Synthesis tools.

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The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation  also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus).

In addition, our highly competitive benefits package is designed to support your success at work, at home, and r recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is…