Design Verification Engineer

Company:
Qualcomm Technologies, Inc. Job Area:
Engineering Group, Engineering Group > ASICS Engineering General

Summary:

Join Qualcomm's design verification team in verifying the high‑speed mixed‑signal IP designs (PCIe, USB, MIPI, CXL, C2C, D2D, DDR, PLL, DAC, ADC, Sensors, etc.) for exciting products targeted for 5G, AI/ML, compute, IoT, and automotive applications. The team is responsible for the complete design verification lifecycle, from system‑level concept to tape‑out and post‑silicon support.

• Define pre‑silicon and post‑silicon testplans based on design specs and using applicable standards working closely with design team.
• Architect and develop the testbench using advanced verification methodology such as System Verilog/UVM, Analog/mixed signal simulation, Low power verification, Formal verification and Gate level simulation to ensure high design quality.
• Author assertions in SVA, develop testcases, coverage models, debug and ensure coverage closure.
• Work with digital design, analog circuit design, modeling, controller/subsystem, & SoC integration teams to complete the successful PHY level verification, integration into subsystem and SoC, and post‑silicon validation.
• From scratch VIP development experience for Serdes controller + PHY is an additional plus.

• Master's/Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field.
• 2+ years ASIC design verification, or related work experience.
• Knowledge of a HVL methodology like System Verilog/UVM.
• Experience working with various ASIC simulation/formal tools such as VCS, Xcellium/NCsim, Modelsim/Questa, VCFormal, Jasper gold, 0
  
  In and others.

• Experience with Low Power design verification, Formal verification and Gate level simulation.
• Knowledge of standard protocols such as PCIe, USB, MIPI, LPDDR, etc.
• Experience in scripting languages (Python, or Perl).
• Experience with mixed-signal IP design verification, such as USB, PCIe, CXL, C2C, D2D, MIPI, UFS, DDR, PLL, Data Convertors (DAC, ADC), or sensors.

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm will provide an accessible process. Email disabili or call Qualcomm's toll‑free number for assistance.

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The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Salary is only one component of total compensation  also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants. In addition, our highly competitive benefits package supports your success at work, at home, and at play.

If you would like more information about this role, please contact Qualcomm Careers.