ASIC Senior Design Engineer

This role has been designed as “Onsite” with an expectation that you will primarily work from an HPE office.

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next.

We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.

Job Family Definition: Designs, analyzes, develops, modifies and evaluates VLSI components and hardware systems. Determines architecture and logic design, design verification through software developed for component and system simulation, and builds physical implementations through development of multidimensional designs involving the layout of complex integrated circuits. Analyzes designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions.

May direct support personnel in the preparation of detailed design, design testing and prototype fabrication.

Management Level Definition: Contributions impact technical components of HPE products, solutions, or services regularly and sustainably. Applies advanced subject matter knowledge to solve complex business issues and is regarded as a subject matter expert. Provides expertise and partnership to functional and technical project teams and may participate in cross-functional initiatives. Exercises significant independent judgment to determine best method for achieving objectives.

May provide team leadership and mentoring to others.

We are looking for a Senior RTL Design Engineer to join our HPE Networking ASIC organization. As part of our fast-paced chip design group, you will become an expert in building high-speed ASICs, from specifications to final netlist. We give you opportunities to work on complex blocks where you can challenge yourself and grow. You will have a significant opportunity to interact with system design teams across geographies.

Open communications, empowerment, innovation, teamwork, and customer success are the foundations of team culture. Thus, you set your own limits for learning, achievements, and rewards.

• Architect complex modules and subsystems used in high performance networking chips.
• Write detailed functional as well as the micro-architecture specification for your module that meets power/area/performance targets.
• Implement the design using Verilog or System Verilog
• Write functional coverage/SVA to help verification catch corner case bugs.
• Make sure your module meets the power targets by using state-of-the-art power reduction techniques during architecture and implementation phases.
• Work with Physical design team for optimal floorplan and timing closure. Identify and fix timing in RTL to meet the frequency target.
• Work with the Verification team to make sure your block is fully validated.
• Provide guidance and mentoring to new college-grad engineers and interns.

• Bachelor’s degree in Electrical Engineering required (Master’s strongly desired) with 10+ years of relevant experience.
• Strong analytical/ problem solving skills.
• Demonstrated skills in leading and implementing high performance modules from specification to final netlist.
• Knowledge of Computer Architecture/networking protocols through prior work is strongly desired.
• Strong coding skills in Verilog/System Verilog through previous work experience are necessary.
• Knowledge of synthesis/lint and other state-of-the-art EDA tools used in typical ASIC development process is highly desired.
• Excellent written and verbal communications skills is necessary.
• Knowledge of Perl/Python is strongly desired.

• Accountability
• Accountability
• Action Planning
• Active…