Hardware Design Engineer

Title:
Hardware Design Engineer 5

Work Location:
Remote

Duration: 5 Months (high possibility for an extension after the budget approval)

Work Schedule:
Standard business hours, no OT

Pay Rate Range: $75 to $80/hr

• Analyze project requirements for planning and execution
• Create and modify UVM simulation environments to verify new features
• Develop and validate product prototypes using simulation models
• Implement checkers, assertions, and functional coverage
• Perform regression testing, triage failures, and debug issues
• Monitor system behaviour and ensure compliance with specifications

• Experience: 10+ years overall experience
• Education: Bachelor’s degree in engineering (required)
• Verification Expertise:
  • Strong hands-on experience with UVM and System Verilog
  • Recent (within last 3 years) IP-level or SoC-level verification experience
• Programming Knowledge:
  • System Verilog (advanced)
  • Verilog (basic to intermediate)
• Verification Domain:
  • FPGA or ASIC-based verification experience

• No hands-on experience with System Verilog and UVM
• No experience creating and writing UVM test benches

• Knowledge of AMBA AXI protocol (nice to have)
• Experience in cloud, storage, or networking acceleration projects

If this is a role that interests you and you’d like to learn more, click apply now and a recruiter will be in touch with you to discuss this great opportunity. We look forward to speaking with you!