IP Enablement Application Engineer

Job Details:

Job Description:

Intel Foundry is a systems foundry dedicated to transforming the global semiconductor industry by delivering cutting‑edge silicon process and packaging technology leadership for the AI era. With a focus on scalability, AI advancement, and shaping the future, we provide an unparalleled blend of an industry‑leading technology, a rich IP portfolio, a world‑class design ecosystem, and an operationally resilient global manufacturing supply chain.

The Aerospace, Defense & Government (ADG) IP Enablement Application Engineer provides comprehensive technical support to Intel Foundry Services customers on IP integration challenges. This dynamic role requires a versatile engineer who engages with IP design teams and internal/external customers across all phases of IP development - from architecture through post‑silicon validation and debug. The position embodies customer obsession by quickly resolving issues and providing hands‑on debug across all design domains.

• Provide comprehensive technical support to Intel Foundry Services customers on IP integration issues, working independently with design teams and customers to solve complex challenges remotely or onsite
• Fully own assigned IPs and work with internal and external customers to help them integrate Intel IPs into SoCs, providing expert technical support throughout the integration process
• Drive resolution of customer issues related to IP collaterals generation, logic design verification, IP release, and integration in SoC environments

• Work with cross‑functional teams to develop SoC and IP integration methodologies and best practices
• Engage with IP development teams to ensure all IP collaterals are generated and provided according to customer requirements and industry standards
• Collaborate with internal teams across Intel and external stakeholders including foundry customers' design teams, IP providers, and EDA vendors on foundational IP integration issue resolution

• Engage in upfront identification and documentation of customer requirements, working with IP design teams to disposition and address requests
• Prepare comprehensive customer training materials and provide training on IP architecture, specifications, and fuse/register settings to enable effective debug
• Create application notes, documentation, and deliver technical training presentations to customers and internal teams

• Drive quality improvements in design kits and documentation, assisting in removing barriers to successful customer design tape‑outs
• Support debugging and problem‑solving activities in collaborative team environments
• Contribute to methodology improvements that enhance IP integration productivity and customer satisfaction

• Strong technical problem‑solving and debugging capabilities
• Ability to work independently and manage customer relationships effectively
• Excellent communication skills for technical training and customer support
• Willingness to travel to customer sites as required

The Minimum qualifications are required to be considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

• US Citizenship required
• Ability to obtain a US Government Security Clearance
• Bachelor's degree in Electrical Engineering, Computer Science, or in a STEM related field of study
• 2+ years of experience in SOC IP Integration
• 3+ years of combined experience in RTL design and DFT using Verilog/System Verilog
• Experience in ASIC or SoC development

• Active US Government Security Clearance with a minimum of Secret level
• Post Graduate degree in Electrical Engineering, Computer Science, or in a STEM related field of study
• Experience with one or more…