External Technology Integration Engineer

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** Welcome!**## .External Technology Integration Engineer page is loaded## External Technology Integration Engineer locations:
US, Arizona, Phoenix time type:
Full time posted on:
Posted Todayjob requisition :
JR0281221#
** Job Details:**##

Job Description:

** This role requires regular onsite presence to fulfill essential job responsibilities.
** The External Technology Integration Engineer at Intel:
* Leads technical integration of external memory and/or foundry silicon technologies into Intel's advanced packaging platforms
* Drives comprehensive chip-to-package interaction (CPI) assessments across Si backend fab, bump, singulation, assembly, and test domains
* Qualifies breakthrough foundry Si/memory technologies and establish innovative Si far back-end and bump design rules
* Orchestrates complex technical programs with multi-disciplinary stakeholders to deliver game-changing results
* Defines package performance specifications and achieve technology certification through strategic test vehicle design layout and data collections
* Performs feasibility studies and provides integrated process solutions to meet desired safety, quality, reliability and output requirements for ultimate transfer to high volume manufacturing.
* Plans and conducts experiments to fully characterize the process throughout the development cycle and to improve performance for each specific product.
* Identifies integrated process solutions to resolve issues or specific requests from customers by partnering with innovators in product engineering and module engineering teams.
* Leverages big data analysis to identify process design weaknesses and/or manufacturing tool issues and proposes corrective, databased solutions.

A highly qualified candidate will exhibit the following behavior traits:
* Strong platform strategic planning and program management experience.
* Demonstrated written and oral communication skills, particularly to an executive audience.
* Willingness to thrive in ambiguous environments.##
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* Qualifications:

** Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

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* Minimum Qualifications:

** Must possess a BA degree in Materials, Chemical Engineering, Chemistry, Physics, Mechanical Engineering with 6+ years of experience in a related field or Master's Degree in Materials, Chemical Engineering, Chemistry, Physics, Mechanical Engineering with 4+ years of experience in a related field or PhD Degree with 2+ years of experience in related field.
Technical experience:  
• 3+ years of experience in developing, qualifying to high volume manufacturing of any one or multiple microelectronic packaging processes. Processes include Si far backend fabrication, bump, assembly, substrate or memory manufacturing processes. (or)  
• 3+ years of experience in integrating multiple complex semiconductor packaging assembly design, processes, materials and tools towards successful qualification and seamless mass production. (or)  
• 3+ years of experience in managing semiconductor technical programs including technical and schedule planning, execution, monitoring and completion of packaging assembly process certifications. (or)  
• 3+ years of experience managing semiconductor suppliers processes/materials/tools or managing customers programs against committed schedule.

** Preferred Qualifications*
* • Experience in various versions of 2.5D and 3D advanced package architectures in the industry, their fabrication processes/materials/tools and their interactions.  
• Experience in driving yield improvement activities for these advanced package architectures.  
• Extensive experience in conducting failure mode and effects analyses (FMEA), technical risk assessments (TRA) and statistical process control (SPC) analyses.  
• Experience in defining a silicon - package architecture through fit study, technical risk assessments along with design for yield (DFY) and design for reliability(DFR) considerations.  
• Experience in structure property relationships and fundamental materials  characterization…