Principal FPGA Engineer

Location: Horsham

Principal FPGA Engineer

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Base pay range

$96,888.00/yr - $/yr

Junior Overview

Senior level

Seniority level

Mid-Senior level

Employment type

Full-time

Job function

Engineering and Information Technology

Industries

Semiconductor Manufacturing

Job Description

FPGA Development for Layer 0 Photonic Line cards (EDFA and ROADM) – 60%

• Design using Coherent EDFA FPGA real time platform (aka OASIS)
• Interpret customer specifications and collaborate with firmware teams to design and implement solutions, including the FPGA top-level architecture.
• Design functional modules and provide detailed design documentation and register interface documentation.
• Perform coding and simulation.
• Conduct design verification, including FPGA logic validation and integration testing with firmware.
• Manage version release and maintain proper documentation.

FPGA Development for Layer1 and System Products (Chassis, high-speed card) – 30%

• Select suitable FPGA/SoC solutions based on system requirements and design top-level architecture.
• Design functional modules and provide detailed design documentation and register interface documentation.
• Perform coding and simulation.
• Conduct design verification, including FPGA logic validation and integration testing with firmware.
• Manage version release and maintain proper documentation.

Legacy Products Sustaining – 10%

• Develop new features based on customer requirements.
• Collaborate with cross functions to investigate field issues.
• Resolve FPGA issues in existing products.

Education & Experience

• Bachelor’s degree or higher in Electronic Engineering, Microelectronics Engineering, or related fields.
• 5+ years of experience in developing FPGA for communication or control system with Altera or Xilinx chips. Optical or Data communication industry experience is preferred.
• Experience with FPGA SoC (NIOS2/ARM/RISC-V based) development, work closely to firmware team for better performance system design.
• Experience with customized protocol design on various interfaces like PCIe, Ethernet, SPI, IIC, uart, etc
• FPGA digital signal processing experience, e.g. low pass filter design and PID close-loop control.
• Experience with lab bench debugging with oscilloscopes and logic analyzers.
• Experience with Linux environment and python script for verification test.

Skills & Other Requirements

• Programming
  
  Languages:
  
  Verilog HDL, system Verilog, Python.
• Experience with Altera FPGA/SoC, toolchain.
• Experience with Xilinx FPGA/SoC, toolchain.
• Experience with Lattice FPGA/CPLD and toolchain.
• Model Sim simulation experience
• Timing constraint and analysis.
• Deliver to an aggressive schedule.
• Self-starter, highly motivated, dedicated and teamwork oriented
• Creative, analytical and structured problem solving capabilities.
• Good inter-team communication skills

Physical Requirements

• Sitting for extended periods while working on a computer or conducting meetings.
• Use of hands and fingers for typing, writing, and handling documents.
• Occasional lifting of objects or materials up to 20 pounds for administrative tasks.
• Ability to communicate verbally and in writing.
• Mobility within the office environment to attend meetings

Safety Requirements

All employees are required to follow the site EHS procedures and Coherent Corp. Corporate EHS standards.

Quality And Environmental Responsibilities

Depending on location, this position may be responsible for the execution and maintenance of the ISO 9000, 9001, 14001 and/or other applicable standards that may apply to the relevant roles and responsibilities within the Quality Management System and Environmental Management System.

Culture Commitment

• Integrity – Create an Environment of Trust
• Collaboration – Innovate Through the Sharing of Ideas
• Accountability – Own the Process and the Outcome
• Respect – Recognize the Value in Everyone
• Enthusiasm – Find a Sense of Purpose in Work

Equal Opportunity Statement

Coherent Corp. is an equal opportunity/affirmative action employer. All qualified applicants will receive…