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AI Hardware ASIC RTL Design Engineer — Accelerators

Job in Palo Alto, Santa Clara County, California, 94306, USA
Listing for: Tesla Motors, Inc.
Full Time position
Listed on 2026-01-23
Job specializations:
  • Engineering
    Systems Engineer, Hardware Engineer, Electronics Engineer, Electrical Engineering
Salary/Wage Range or Industry Benchmark: 124000 - 282000 USD Yearly USD 124000.00 282000.00 YEAR
Job Description & How to Apply Below
A leading automotive technology company is seeking an experienced ASIC RTL Design Engineer in Palo Alto, CA, to advance AI hardware. You will design efficient RTL and collaborate with teams to meet design targets, enhancing performance and power efficiency. With a competitive salary range of $124,000 to $282,000 annually, benefits include comprehensive health plans, 401(k), and employee discounts. Ideal candidates have extensive experience in low latency and bandwidth design, Verilog logic design, and hold a degree in Electrical Engineering or Computer Science.
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