Signal Integrity Design Engineer

Join our team as we continue to expand our product portfolio in the Data Center and Carrier Service Provider. The IP Routing Hardware organization is very flat - there are few levels of management between the Individual Contributor and the VP of Hardware. We are also very lean - each Engineer spends more time doing engineering work and less time on overhead.

As a result, your work has high visibility, and your decisions directly impact product design.

DCN
2026

• Minimum
  
  B.Sc or
  
  B.Eng in Electrical Engineering or Computer Engineering
• 5 years of total work experience or post‑graduate studies simulating high‑speed Ser Des in PCB applications
• Expert in using Ansys HFSS or Dassault CST simulation tools
• Hands‑on measurement skills with TDR/VNA equipment and oscilloscopes
• Excellent interpersonal and communication skills

It would be nice if you also had:

• Familiarity with Mentor Hyperlynx, HSpice, and Cadence Allegro
• Knowledge of PAM4 transmitter and receiver analog and digital technologies: FIR, CTLE, DFE, & FEC
• Experience in the theoretical aspects of EMC/EMI and ITU/IEEE/Bellcore telecommunications standards
• Programming/Scripting ability (C/Python/Matlab)

As a Signal Integrity Engineer, you will:

• Simulate ultra high‑speed PCB channels (112G+ Ser Des rates) including connectors, breakouts, and via structures
• Provide signal integrity guidance to Digital Hardware Designers using simulated and empirical results
• Help design PCB test boards to corroborate simulations