Digital IC Design Engineer

Job Title: Digital IC Design Technical Lead

Position: Permanent

Location: Germany

Salary Range: DOE

Client Information:

Building the chiplet-based solutions that will power the vehicles of tomorrow to be smarter, safer, and more efficient.

As a Digital IC Design Engineer you will be part of our multidisciplinary team to:

• Define concepts and architectures of high-performance System‑on‑Chip (SoC) design for automotive applications, addressing safety, security, and interfacing (e.g. D2D) challenges.
• Collaborate in an inter‑disciplinary team. Understand customer needs, challenges, and requirements and translate them into solutions that can be incorporated into your designs.

• Take responsibility for the design of high‑performance automotive SoCs. This includes:
  • Working closely with architects and system engineers to understand design specifications and performance targets.
  • Proposing and refining architectures and contributing to IC specification definition.
  • Proposing design and implementation strategies and managing them over the duration of the project.
  • Developing and implementing RTL code that meets functional, performance, and area requirements based on design specifications.
  • Collaborating with system architect teams, digital implementation teams, embedded software, validation teams, and other project stakeholders.
  • Supervising verification planning and activities (possibly including mixed‑signal verification).
• Document design specifications, RTL code, and design trade‑offs clearly.
• Collaborate in an inter‑disciplinary team to translate customer requirements into effective design solutions.
• Provide technical support and documentation for verification and physical design teams.

• MSc or PhD in Electronics Engineering with 10+ years of relevant experience.
• Minimum of 2 years technical leadership experience
• Strong experience with digital circuit design in (System)
  Verilog.
• Proven expertise in architecting and designing SoCs with CPU/GPU, peripheral subsystems, NoC, PLLs, and interfaces.
• Experience with D2D interfaces and protocols (e.g., UCIe) for high‑performance data exchange between chiplets.
• Strong background in digital verification: linting, verification plan definition, verification methodologies (UVM), code/functional coverage, constrained random verification, execution, and tracking.
• Solid understanding of the digital ASIC design flow: logic synthesis, timing analysis, power simulation, logic equivalence, DFT, and/or P&R.
• Knowledge of stringent automotive application requirements such as functional safety (ISO 26262), reliability (AEC-Q100), and cybersecurity.
• Experience with scripting languages (TCL, Matlab, Python); familiarity with Cadence IC design tools is a plus.
• Understanding of the process of handing over RTL to physical implementation teams (SCD, UPF, clock definition, etc.).
• Knowledge of FPGA prototyping and low‑power design is a plus.
• Structured, detail‑oriented way of working, with strong ability to plan and manage activities.
• Previous experience working closely with internal and/or external stakeholders is a plus.
• Demonstrated ability to take initiative and responsibility for team success; proactive, independent, and creative problem‑solver.
• Excellent communication skills in English (both written and spoken).

Jessica@microtech‑ for more information on this role and similar opportunities