Sr. Digital Design Engineer

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Job details

This Jobot Job is hosted by Christina Finster

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Salary $180,000 - $180,000 per year

A Bit About Us

Our Series B client is building a Global Bluetooth network dedicated to machine-to-machine connectivity. They differentiate themselves as the first modem-less and gateway-less, direct-to-satellite network from off-the-shelf BLE chips.



Why join us?

Compensation & Benefits

Salary $150K – $180K/year (commensurate with experience)

???? Comprehensive Benefits – Health, Dental, Vision, & HSA options

Unlimited PTO – Take the time you need to recharge

Parental Leave – Paid time off to welcome a new child

Commuter Benefits – If working from HQ

Learning & Development Allowance – Invest in your growth

Health & Wellness Stipend – Support for your physical and mental well-being

Sabbatical Program – Recharge and explore new ideas after five years

Cutting-Edge Space Tech – Work on state-of-the-art satellite systems

Additional Perks – Team retreats, swag, and more

Job Details

As a Senior Digital Design Engineer, you will play a key role in developing the system architecture and RTL codebase for the FPGA module that performs localization and decodes packets from decoding from ground-based BLE device transmissions. You’ll collaborate closely with a cross-functional team of system, hardware, and software engineers to optimize the throughput, accuracy, power efficiency, and reliability of the Hubble satellite constellation.

This is a full-time position based in Seattle, WA.

AN IDEAL CANDIDATE HAS

A Sense of Urgency Lead projects from concept to reality, rapidly and effectively

First Principles Engineering Have a strong understanding of the whys behind the whats; have the ability to extrapolate from first principles to complex system design

High Learning Agility Love to learn; have a grounded approach to recognizing your weaknesses and take the initiative to brush up on and sharpen your engineering foundations to better collaborate with your teammates with different backgrounds

System-Level Design and Analysis Understand the requirements flow down process and be able to quickly iterate on evolving requirements

Excellent Communication Skills Effectively convey ideas and communicate technical topics with engineering, build team, and operations; run self-directed design reviews and participate in reviews of parallel systems

Anticipation of Needs Identify problems, think creatively, and rapidly produce reliable and cost-effective solutions to meet the ever growing and changing needs of an early-stage company

Basic Qualifications

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.

5+ years of experience in FPGA-based digital design, with a strong emphasis on real-time signal processing and communication systems.

Proven expertise in RTL design (Verilog/System Verilog) for high-throughput, low-latency digital receivers.

Experience with high-speed memory interfaces, particularly DDR/DDR3/DDR4, including controller integration, timing constraints, and performance tuning.

Proficient in integrating and validating high-speed serial interfaces such as LVDS, SPI, I2C, UART, and SERDES-based links (e.g., JESD
204, PCIe, Ethernet).

Skilled in FPGA synthesis, timing closure, and resource optimization on platforms such as Xilinx or Intel/Altera.

Proficiency with simulation and verification tools (e.g., Model Sim, Questa, Vivado, VUnit) and scripting languages (Python, Tcl).

Deep understanding of digital signal processing (DSP) principles, including filtering, correlation, decimation, and fixed-point arithmetic.

Experience developing packet decoders for wireless communication protocols (e.g., BLE, Zig Bee, LoRa, custom PHYs).

Ability to work closely with RF…