ML Accelerator Architect

Join us as an ML Accelerator Architect at Waymo
, an autonomous driving technology company dedicated to building the world's most trusted driver. Since its origins as the Google Self-Driving Car Project in 2009, Waymo has developed the Waymo Driver— The World's Most Experienced Driver™—to improve mobility while saving lives. The Driver powers our fully autonomous ride‑hail service and has provided over ten million rider‑only trips, driven more than 100 million miles on public roads and tens of billions of simulation miles across 15+ U.S. states.

Our Compute Team is tasked with delivering the compute platform that runs the autonomous vehicle's software stack. We architect and create high‑performance custom silicon, develop system‑level compute architectures that push boundaries of performance, power, and latency, and collaborate with many teams to ensure optimal hardware and software design.

• Analyze workloads and map them efficiently to hardware, proposing novel hardware‑friendly implementations and projecting performance
• Architect, simulate, and design advanced machine‑learning solutions for autonomous driving technology
• Work closely with compiler and model developers to influence engineering trade‑offs and future model architectures
• Build scalable tools for simulator modeling and performance evaluation
• Collaborate with cross‑functional engineering teams to identify opportunities and requirements

• BS degree in Computer Science, Computer Engineering, or a related field, or equivalent practical experience
• 3+ years of designing/architecting complex, high‑performance architectures—CPUs, GPUs, and/or ML accelerators—in industry or through doctoral research
• 1+ year of experience with machine‑learning architectures, acceleration, and model optimization
• Strong C++ programming and algorithmic problem‑solving skills

• 1+ year of modeling high‑performance architectures in cycle‑aware simulators
• Track record of analyzing workloads and delivering novel hardware‑software solutions that vastly improve performance and efficiency
• Familiarity with ML model architectures and their compute characteristics (bottlenecks, optimization opportunities)
• Experience with microarchitecture design (System Verilog or HLS)

Salary Range: $170,000—$216,000 USD (full‑time, US locations). Additional benefits include discretionary annual bonus, equity incentive plan, and generous company benefits program.