PCB Layout Design Engineer

PCB Layout Design Engineer

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Immediate need for a talented PCB Layout Design Engineer. This is a 06‑12+ months contract opportunity with long‑term potential located in Fremont, CA (Onsite). Pay Range: $60‑$65 /hour. Employee benefits include health insurance (medical, dental, vision), 401(k) plan, and paid sick leave (depending on work location).

• Key
  
  Skills:
  
  Allegro tool
• High Speed Interface Routing (DDR4, DDR5, PCIe)
• Constraint Management
• High speed PCB layout design experience is mandatory
• 10 years of CAD experience, Cadence Allegro Layout tool 17.4 and above experience is mandatory
• Hands‑on experience in HDI micro‑via technology in Allegro 17.4 and above
• Intel or high‑complex SoC/Microprocessor/FPGA based PCB design experience preferred
• Ability to deliver PCB CAD layout of high‑density, high‑speed memory designs (DDR4/LPDDR4), PCIe Gen 4 or Gen 5, power delivery, mixed analog/digital
• Deep knowledge of CES (Constraint Editor) and high‑speed constraint‑driven designs, DFA/DFM/DFT knowledge to adhere to quality PCB fabrication and assembly assurance
• Excellent communication skills and ability to lead the team for quality customer deliverables

Mid‑Senior level

Full‑time

Engineering and Information Technology

Pyramid Consulting, Inc. provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state or local laws.