FPGA Design Verification Engineer

Overview

Role description

FPGA Design Verification Engineer

Architect II - VLSI

We are seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team, working on state of the art technologies. In this role, you will be responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability. You will work closely with design engineers to develop and execute verification plans, identify and debug issues, and contribute to the overall quality of our products.

• Create and maintain test benches using industry-standard verification methodologies (e.g., UVM, System Verilog, RTL).
• Write and debug test cases to verify functionality, performance, and corner cases.
• Identify and debug issues, working closely with design engineers to resolve them.
• Participate in design reviews and contribute to the overall verification strategy.
• Stay up-to-date with the latest verification methodologies and tools.

This position description identifies the responsibilities and tasks typically associated with the performance of the position. Other relevant essential functions may be required.

• Strong understanding of FPGA, ASIC, RTL design principles and architectures.
• Proficiency in System Verilog and UVM verification methodology.
• Experience with Linux operating system.
• Experience with industry-standard verification tools (e.g., Questa Sim, Synopsys VCS, Haps).
• Experience with high-speed I/O design and protocols. Knowledge of PCIe, I2C, SPI, etc.
• Hands on experience with lab debugging tools including logic analyzer, oscilloscope, and JTAG.
• Excellent debugging and problem-solving skills.
• Strong communication and collaboration skills.
• Desired
  
  Skills:
  
  Experience in hardware validation or embedded test automation
• Experience with scripting languages (e.g., Python, Perl).

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
• 10+ years of experience in FPGA design or verification.
• Familiarity with hardware description languages (e.g., VHDL, Verilog).

Role

Location:

California

Compensation Range: $182,000-$273,000

Full-time, regular employees accrue a minimum of 10 days of paid vacation per year, receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year), 10 paid holidays, and are eligible for paid bereavement leave and jury duty. They are eligible to participate in the Company's 401(k) Retirement Plan with employer matching. They and their dependents residing in the US are eligible for medical, dental, and vision insurance, as well as the following Company-paid Employee Only benefits: basic life insurance, accidental death and disability insurance, and short- and long-term disability benefits.

Regular employees may purchase additional voluntary short-term disability benefits, and participate in a Health Savings Account (HSA) as well as a Flexible Spending Account (FSA) for healthcare, dependent child care, and/or commuting expenses as allowable under IRS guidelines. Benefits offerings vary in Puerto Rico.

Part-time employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year) and are eligible to participate in the Company's 401(k) Retirement Plan with employer matching.

Full-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year) and are eligible to participate in the Company's 401(k) program with employer matching. They and their dependents residing in the US are eligible for medical, dental, and vision insurance.

Part-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year).

All US employees who work in a state or locality with more generous paid sick leave benefits than specified here will receive the benefit of those sick leave laws.

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