ASIC FPGA Design and Verification Engineer Experienced, Lead, or Senior - MTV

Overview

At Boeing, we innovate and collaborate to make the world a better place. We’re committed to fostering an environment for every teammate that’s welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us.

Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC and/or FPGA Design and Verification Engineers (Experienced, Lead, or Senior) to join us as part of our Boeing Electronic Products team at the heart of Boeing’s products; ASICs and FPGAs in Mountain View, CA
. From complex digitally beam formed phased arrays for constellation satellite programs to computing and networking equipment for commercial airplanes, the Boeing Electronic Products group develops ASICs and FPGAs that are at the heart of Boeing’s products!

We leverage leading-edge technology and work with world-class partners to provide some of the most complex SoCs in the world. We develop robust, high-performance custom processors using the latest ARM IP to enable high-integrity, low SWAP-C flight computers. And we re applying the latest digital IC design processes with industry-best tools to enable applications that cut across every domain  diverse development portfolio provides opportunities to learn with exposure to the breadth of the Boeing product line – approximately half our design work is within the Space & Launch business unit, and half is from other parts of Boeing (Avion

X; Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems).

• Lead FPGA/ASIC designs, including multi-FPGA/ASIC programs and teams with design and verification engineers, and manage team execution to meet program milestones

• Collaborate with customers, system engineers, and hardware engineers to drive requirements capture and architect digital logic functions to meet mission/customer needs

• Explore trade-space of potential ASIC/FPGA technologies and determine the optimal parts, weighing Schedule, Cost, Risk, Area, Power (SCRAP) vs. performance

• Implement FPGA/ASIC with latest design practices and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs)

• Integrate DSP IP from Boeing’s algorithm team and third-party IP as needed

• Perform static timing analysis, LEC, CDC, linting, and other necessary checks to ensure the design is completed on schedule

• Develop Functional Coverage Models and perform Code Coverage to verify designs in simulation

• Create self-checking and reusable test benches from scratch, applying Object Oriented Programming concepts such as Inheritance and Polymorphism, and leverage UVM to create drivers, monitors, predictors, and scoreboards

• Drive FPGA-based prototyping and validation depending on program and system requirements and complexity

• Validate design through hardware integration test with special test equipment, test-beds, and higher-level systems as needed

• Train and mentor less senior engineers across the department and help build effective project teams

• Bachelor of Science degree from an accredited course of study in engineering, engineering technology (includes manufacturing engineering technology), chemistry, physics, mathematics, data science, or computer science

• 5+ years of ASIC/FPGA design or verification experience (or minimum Master’s and 3+ years of ASIC/FPGA design or verification experience)

• Experience with ASIC/FPGA architectural definition, and detailed design implementation and functional verification using System Verilog with delivery/release of production designs

• Professional experience with hardware-based integration and test of ASIC/FPGA designs

• 10+ years of related work experience or an equivalent combination of education and experience

• Master's Degree in EE, Computer Engineering/Science, or related field, or equivalent experience

• Proven record of leading ASIC/FPGA design and/or verification teams, including tracking and reporting progress to stakeholders

• Experience with hardware emulators, especially Palladium

• Proficie…