FPGA Design Verification Engineer/Technical Lead II - VLSI
Job in
Mountain View, Santa Clara County, California, 94039, USA
Listed on 2026-01-13
Listing for:
Axelon Services Corporation
Full Time
position Listed on 2026-01-13
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer, Software Engineer, Hardware Engineer
Job Description & How to Apply Below
(
Job Title:
FPGA Design Verification Engineer / Technical Lead II - VLSI)
(
Location:
Mountain View, CA)
(Pay: Competitive salary based on experience)
Overview:
- We are seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team, working on state-of-the-art technologies.
- Responsible for the verification of complex FPGA designs, ensuring their functionality, performance, and reliability.
- Work closely with design engineers to develop and execute verification plans, identify and debug issues, and contribute to the overall quality of our products.
- Strong understanding of FPGA design principles and architectures.
- Proficiency in System Verilog and UVM verification methodology.
- Experience with industry-standard verification tools (e.g., Questa Sim, Synopsys VCS).
- Knowledge of code coverage and functional coverage analysis.
- Excellent debugging and problem-solving skills.
- Strong communication and collaboration skills.
- Create and maintain test benches using industry-standard verification methodologies (e.g., UVM, System Verilog, RTL).
- Write and debug test cases to verify functionality, performance, and corner cases.
- Identify and debug issues, working closely with design engineers to resolve them.
- Participate in design reviews and contribute to the overall verification strategy.
- Stay up-to-date with the latest verification methodologies and tools.
- Strong understanding of FPGA, ASIC, RTL design principles and architectures.
- Proficiency in System Verilog and UVM verification methodology.
- Experience with Linux operating system.
- Experience with industry-standard verification tools (e.g., Questa Sim, Synopsys VCS, Haps).
- Experience with high-speed I/O design and protocols. Knowledge of PCIe, I2C, SPI, etc.
- Hands-on experience with lab debugging tools including logic analyzer, oscilloscope, and JTAG.
- Excellent debugging and problem-solving skills.
- Strong communication and collaboration skills.
- Experience in hardware validation or embedded test automation.
- Experience with scripting languages (e.g., Python, Perl).
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- 10 years of experience in FPGA design or verification.
- Familiarity with hardware description languages (e.g., VHDL, Verilog).
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