Validation & Verification Manager

Efficient is developing the world’s most energy-efficient general-purpose computer processor. Efficient’s patented technology uses 100x less energy than state of the art commercially available ultra-low-power processors and is programmable using standard high-level programming languages and AI/ML frameworks. This level of efficiency makes perpetual, pervasive intelligence possible: run AI/ML continuously on a AA battery for 5-10 years. Our platform’s unprecedented level of efficiency enables IoT devices to intelligently capture and curate first-party data to drive the next major computing revolution

Efficient is seeking an experienced and technically strong Verification & Validation Manager to lead the end-to-end strategy and execution of verification and validation — including pre-silicon verification, emulation, and post-silicon validation and test
. This leader will own the processes, infrastructure, teams, and outcomes that ensure our processors meet the highest standards of quality, performance, and reliability.

This individual will manage and scale a multidisciplinary V&V organization, work cross-functionally with architecture, digital design, software, and manufacturing teams, and interface closely with external verification and silicon validation vendors. As a technical leader, this person will shape company-wide methodologies that support aggressive product roadmaps and world-class silicon execution.

This is a rare opportunity to build and lead a full-stack V&V function at a fast-moving startup redefining energy-efficient compute.

• Own the holistic verification and validation strategy — pre-silicon verification, emulation, and post-silicon validation.
• Define and implement scalable methodologies, processes, and infrastructure that ensure thorough coverage, high-quality implementation and predictable execution across multiple product generations.
• Build, manage, and mentor a growing team consisting of DV engineers, emulation engineers, silicon validation/test engineers (including senior-level reports), and compiler/program-driven verification engineers.
• Create organizational plans, establish goals and KPIs, drive performance management, and oversee hiring for new V&V roles.
• Provide regular status updates, risk assessments, and technical insights to senior leadership and stakeholders.

• Oversee development of comprehensive SoC-level and subsystem-level verification plans, ensuring alignment with architectural and design requirements.
• Direct the creation, maintenance, and execution of System Verilog/UVM-based test benches, stimuli, agents, checkers, and coverage models.
• Set and drive the vericiation roadmap, milestone plans, and coverage closure strategies.
• Manage external verification service vendors; ensure deliverables, quality, and timelines are met.
• Lead debugging efforts for complex design and functional issues in collaboration with design, architecture, and software teams.

• Define and lead the company’s emulation and FPGA-based prototyping strategy.
• Oversee emulation platform bring-up, test content migration, and performance/debug methodologies.
• Ensure emulation infrastructure supports both architecture validation and early software development.
• Partner with firmware/software teams to enable pre-silicon validation at scale.

• Oversee planning and execution of silicon bring-up, characterization, validation, test-flow development, and productization.
• Drive the creation of the New Product Introduction (NPI) plan for validation, test hardware/software, and manufacturing readiness.
• Manage relationships with external silicon validation and test vendors — establish scope, ensure performance, and maintain accountability.
• Direct post-silicon debug, including digital, analog, mixed-signal, and timing-related issues.
• Guide validation engineers in developing repeatable, robust silicon validation methodologies.
• Review and deliver detailed silicon reports, characterization results, and technical summaries to executives and customers.

• Serve…